Performance of a scalable silicon quantum processor

20 October, 2016 @ 4:00 pm

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We have recently proposed [1] a new scheme to operate and couple Si:P spin qubits that does not require precise donor placement and spaces them apart allowing plenty of room for interconnects. Such a scheme relies on manipulating the electron charge state, and therefore care has to be taken in protecting the qubit from charge noise. In this seminar I will discuss how different sources of noise affect the performance of our quantum gates, and show that, by operating the qubits in regimes where they are protected from noise, fidelities compatible with quantum error correction are within reach.

  1. G Tosi, Silicon quantum processor with robust long-distance qubit couplings. arXiv:1509.08538 (2015)


20 October, 2016
4:00 pm


Newton Building, UNSW
CQC2T Conference Room, Level 2, Newton Building J12, UNSW Kensington Campus NSW Australia


University of New South Wales